Article by Ayman Alheraki on January 11 2026 10:34 AM
The RISC-V architecture was developed in 2010 at the University of California, Berkeley, by a team led by Professor Krste Asanović, with key members including Andrew Waterman and David Patterson. This architecture was designed as an open, flexible instruction set, aimed at providing a simple instruction architecture that could be used for academic, research, and commercial purposes.
Since its launch, the RISC-V architecture has grown rapidly due to its open nature, meaning anyone can use and develop it without licensing fees. This has led to wide adoption in the academic community and among startups looking for an open, customizable architecture.
The primary goal of developing RISC-V was to provide a free, flexible instruction set that could be easily used across different applications, from small embedded systems to high-performance computing. Here are some key design goals of RISC-V:
Simplicity: RISC-V is based on reduced instruction set computing (RISC) principles, which means the architecture is simple and easy to understand, making it easier to develop hardware and software.
Flexibility and Scalability: RISC-V is modular in design, allowing instructions to be modified and features added as needed, enabling custom applications without changing the core architecture.
Future-Focused: RISC-V supports 32-bit, 64-bit, and even 128-bit processors, making it scalable for use in modern and high-performance computing, as well as advanced applications in artificial intelligence and machine learning.
RISC-V has emerged as a strong competitor to ARM and x86 architectures for several reasons:
Cost: As an open-source architecture, companies do not need to pay licensing fees, reducing the cost of producing RISC-V-based processors.
Customization: RISC-V is highly customizable, allowing companies to modify the architecture to suit their specific needs instead of relying on fixed specifications as in ARM and x86.
Community Support: Being open-source, RISC-V has a growing developer community that provides tools, enhancements, and projects that can compete with commercial products.
Although ARM and x86 hold a large market share, particularly in mobile devices and personal computers, RISC-V is gaining ground in fields such as Internet of Things (IoT), embedded systems, and even industrial applications that require specialized and flexible processors.
Due to the growing popularity of RISC-V, several operating systems have started supporting it. Here are some of the major ones:
Linux: RISC-V is well-supported by the Linux kernel, with most Linux distributions compatible with this architecture, making it easier to use in embedded and industrial applications.
Windows: Currently, there is no official version of Windows that supports RISC-V, but Microsoft has shown interest in this architecture, which may indicate potential support in the future.
FreeBSD and NetBSD: These open-source operating systems have also started providing support for RISC-V.
Android: Support for RISC-V in Android is under development, with companies working on RISC-V-compatible versions of Android for IoT devices and mobile systems.
Despite the advantages of the RISC-V architecture, several challenges hinder its widespread adoption:
Lack of Software: One major challenge is the lack of support from some widely-used software, especially those that rely on x86 or ARM.
Strong Competition from ARM and Intel: ARM dominates the mobile and embedded markets, while x86 is dominant in personal computers and servers.
Limited General Awareness: Being a relatively new architecture, there is a need to build technical knowledge around it and train more developers.
The RISC-V architecture is expected to continue growing, especially with open-community support and the interest of many companies in moving away from the licensing constraints imposed by ARM and Intel. In the future, we may see RISC-V in a wide variety of applications, ranging from simple IoT devices to high-performance computing in data centers.