Designing an x86-64 Assembler: Detailed Examples for Each Instruction Class

In this section, we provide concrete, detailed examples for the primary instruction classes covered in this chapter. These examples illustrate typical usage patterns, operand encoding considerations, and highlight subtle nuances necessary for accurate assembly programming and assembler design.

1. Data Movement Instructions Examples

MOV (Move Data) Moves data between registers, memory, and immediate values.

; Move immediate 0x10 into 64-bit register RAX
mov rax, 0x10

; Move 32-bit register value ECX into EDX
mov edx, ecx

; Move data from memory address pointed by RSI into RAX
mov rax, [rsi]

; Move 128-bit XMM register to memory (aligned)
movaps xmm0, [rbx]

Considerations:

• MOV supports various operand sizes: 8, 16, 32, and 64 bits in general registers; 128, 256, and 512 bits in SIMD registers with appropriate instructions.

• Assembler must handle encoding with proper prefixes (REX for 64-bit, VEX/EVEX for SIMD).

• MOV cannot directly move data between two memory locations.

2. Arithmetic/Logic Instructions Examples

ADD (Addition) and SUB (Subtraction)

; Add immediate value 5 to 64-bit register RAX
add rax, 5

; Subtract RBX from RDX
sub rdx, rbx

; Add packed double-precision floats in XMM0 and XMM1, result in XMM2 (SSE)
addpd xmm2, xmm1

AND (Bitwise AND) and XOR (Exclusive OR)

; Perform bitwise AND between EAX and ECX, result in EAX
and eax, ecx

; Exclusive OR to clear register (common idiom)
xor rax, rax

Considerations:

• Arithmetic instructions update RFLAGS, affecting conditional operations.

• SIMD arithmetic requires correct prefixes and register width awareness.

• Immediate operands have size and sign restrictions.

3. Control Flow Instructions Examples

JMP (Unconditional Jump)

; Jump to label 'loop_start'
jmp loop_start

Conditional Jumps (JE, JNE, JL, JG, etc.)

; Jump if zero flag is set (equal)
je equal_label

; Jump if not equal
jne not_equal_label

CALL and RET

; Call procedure at address stored in RAX
call rax

; Return from procedure
ret

Considerations:

• Control flow instructions use relative or register/memory addressing.

• Relative jumps support signed 8-bit or 32-bit offsets; assembler calculates displacement.

• CALL pushes return address on stack; RET pops return address.

4. Stack Manipulation Instructions Examples

PUSH and POP

; Push RBP onto stack
push rbp

; Pop top of stack into RBP
pop rbp

ENTER and LEAVE (Function Prologue/Epilogue)

; Allocate 32 bytes of stack frame and save previous base pointer
enter 32, 0

; Restore base pointer and deallocate stack frame
leave

Considerations:

• PUSH and POP update RSP accordingly.

• ENTER and LEAVE manage stack frames automatically but are less commonly used in modern optimized code.

• Assembler must encode operand size correctly (16/32/64-bit variants).

5. String Instructions Examples

MOVSB and MOVSW (Move String Byte/Word)

; Move byte from [RSI] to [RDI], increment RSI and RDI
movsb

LODSB (Load String Byte)

; Load byte from [RSI] into AL, increment RSI
lodsb

STOSB (Store String Byte)

xxxxxxxxxx
asmCopyEdit; Store AL into [RDI], increment RDI
stosb

Considerations:

• REP prefixes can repeat instructions for block moves or scans.

• Direction Flag (DF) affects increment/decrement of RSI and RDI.

• Useful for memory initialization, copying, or searching.

6. System-Level Instructions Examples

HLT (Halt Processor)

hlt

CLI and STI (Clear/Set Interrupt Flag)

cli   ; Disable interrupts
sti   ; Enable interrupts

SYSENTER / SYSEXIT (Fast System Calls)

sysenter

Considerations:

• Privileged instructions; usage restricted to ring 0.

• Essential for OS kernel and system-level programming.

• Assembler must support proper instruction encoding and privilege checks.

7. SIMD Instructions Examples

Packed Addition with SSE

; Add packed single-precision floats in xmm1 to xmm0
addps xmm0, xmm1

AVX256 Vector Multiply

; Multiply packed double-precision floats in ymm1 and ymm2, result in ymm0
vmulpd ymm0, ymm1, ymm2

AVX-512 Masked Blend

; Blend xmm1 and xmm2 based on mask k1, store result in xmm0
vblendmps xmm0 {k1}, xmm1, xmm2

Considerations:

• Proper VEX and EVEX prefix encoding critical for AVX and AVX-512 instructions.

• Mask registers control conditional execution in AVX-512.

• SIMD instructions have strict operand alignment and size requirements.

8. Summary

These detailed examples provide a foundational understanding of typical instructions from each primary category. For assembler implementation, supporting correct operand encoding, prefix management, and operand size handling are essential. Understanding instruction semantics and side effects on processor state (e.g., flags, registers, memory) enables robust assembler design and accurate machine code generation.