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Full SIB + ModRM + REX combined diagram
Full SIB + ModR/M + REX combined diagram
1. Full Instruction Layout (x86-64)
+--------+---------+----------+-------+--------+--------+| REX | OPCODE | ModR/M | SIB | DISP | IMM |+--------+---------+----------+-------+--------+--------+
Not all fields are always present, but this is the maximum structure.
2. Core Decoding Pipeline (High-Level)
MACHINE INSTRUCTION BYTES|v+-----------------------------+| REX PREFIX || 0100WRXB |+-----------------------------+| | | || | | +--> R/M or BASE extension| | +---------> INDEX extension (SIB)| +-----------------> REG extension+-------------------------> 64-bit operand size|v+-----------------------------+| OPCODE |+-----------------------------+|v+-----------------------------+| ModR/M || MOD | REG | R/M |+-----------------------------+|v+-----------------------------+| SIB || SCALE | INDEX | BASE |+-----------------------------+|v+-----------------------------+| FINAL REGISTER SELECTION || 4-bit = REX + 3-bit field |+-----------------------------+
3. ModR/M + SIB + REX Combined View
This is the most important diagram.
REX BYTE+------------------+| W R X B |+------------------+| | | || | | +----------------------+| | +--------------------+ || +------------------+ | || | | |v v v v+------------------------------------------------------+| ModR/M BYTE || 7 6 5 4 3 2 1 0 || MOD REG R/M |+------------------------------------------------------+| | || | || | +----------------------+| | || v v| REX.R extends REG REX.B extends R/M| (or SIB base)|v+------------------------------------------------------+| SIB BYTE || 7 6 5 4 3 2 1 0 || SCALE INDEX BASE |+------------------------------------------------------+| || |v vREX.X extends REX.B extends BASEINDEX
4. Full Register Expansion Logic
3-bit → 4-bit transformation
Final Register = (REX bit << 3) + 3-bit field
So:
0xxx → RAX–RDI1xxx → R8–R15
5. Detailed Example (Full Decode Flow)
Instruction:
mov r10, [r8 + r9*4]
Machine code (conceptual):
REX ModR/M SIB DISP
Example breakdown:
4C 04 8C ...
STEP 1 — REX decode
4C = 01001100
Split:
0100 W R X B1 1 0 0
Meaning:
W = 1 → 64-bit operand
R = 1 → REG extended
X = 0 → INDEX not extended
B = 0 → BASE not extended
STEP 2 — ModR/M decode
04 = 00000100
Split:
00 000 100MOD REG R/M
Meaning:
MOD = 00 → memory addressing
REG = 000
R/M = 100 → indicates SIB follows
STEP 3 — SIB decode
8C = 10001100
Split:
10 001 100SCALE INDEX BASE
Meaning:
SCALE = 10 → multiply by 4
INDEX = 001
BASE = 100
STEP 4 — Apply REX extensions
INDEX field:
REX.X = 0INDEX = 001 → RCX
BASE field:
REX.B = 0BASE = 100 → RSP
STEP 5 — Effective address
Final expression:
[rsp + rcx * 4]
6. Full Visual Execution Flow
MACHINE CODE4C 04 8C ...|v+------------------+| REX = 4C || W R X B = 1 1 0 0|+------------------+|v+------------------+| ModR/M = 04 || REG=000 R/M=100 |+------------------+|vR/M = SIB present|v+------------------+| SIB = 8C || SCALE=4 || INDEX=RCX || BASE=RSP |+------------------+|v+------------------+| Final Address || [rsp + rcx*4] |+------------------+
7. Key Mental Model (Very Important)
Think of decoding like stacking layers:
REX → extends registers (adds 4th bit)ModR/M → chooses operation + base structureSIB → enables complex memory mathDISP → adds constant offsetIMM → immediate value
8. One-Sentence Summary
REX extends register encoding, ModR/M selects operands, and SIB builds complex memory addressing like:
[base + index * scale + displacement]
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